Waveform Sampling Chip (ASIC) Design

Add documents relating to chip design in /psec/links/psec/library/chipdesign and make a link to it on this webpage.

Chip Reviews

July 2009 - Sampling Chip Review
August 2010 - Sampling Chip Review

Misc Docs

Anode Return Path Circuitry Diagram
Poster of Time Stretcher Chip (PPT) by Fukun Tang
Diagram of Proposed Time Stretcher by Fukun Tang
Signal from Simulation of PLL
Diagram of Phase-Locked Loop (PLL)Circuitry


Instructions for Submitting Chip to MOSIS

10-20GS/s Sampling chip documents

4-channel sampling chip minimum specifications
4-channel sampling chip layout
4-channel sampling chip doc
4-channel sampling chip DC tests card
4-channel sampling chip pad description
4-channel sampling chip bonding diagram
4-channel sampling chip pads drawing
4-channel sampling chip DC tests board
4 x 4-channel analog electronics assembly

Analog and Digital Boards

Link to Schematics and Layout of Mircea's PSEC2 Flip Chip ADC Module

Waveform Sampling Methods

A New Timing Calibration Method for Switched Capacitor Array Chips to Achieve Sub-Picosecond Resolutions - Stefan Ritt, 2014 Workshop on Picosecond Photon Sensors, Clermont-Ferrand